Document Type and Number:
Japanese Patent JPH0336328
Kind Code:
B2
Abstract:
A capacitor simulator circuit comprises a first node, a first capacitor coupled between a second node and a reference potential, a second capacitor coupled between a third node and a reference potential, a resistor coupled between the first and third nodes, a first electrical switch arranged when in an open state to electrically isolate from one another the first and second nodes and when in a closed state to electrically coupled together the first and second nodes, a second electrical switch arranged when in an open state to electrically isolate from one another the second and third nodes and when in a closed state to electrically couple together the second and third nodes. One of the first and second switches are arranged to be opened while the other is closed and means is provided for reversing the states of the first and second switched (clock input 12) in synchronism with one another at a predetermined rate, whereby in response to a predetermined current applied to the first node there appears at that node a potential which increases with time. The simulator circuit is particularly suitable for fabrication employing bipolar technology but can also be implimented using MOS technology.
Inventors:
RODONII JEEMUSU ROOTON
Application Number:
JP672983A
Publication Date:
May 31, 1991
Filing Date:
January 20, 1983
Export Citation:
Assignee:
PLESSEY OVERSEAS
International Classes:
H03H11/48; H03H19/00