- Patent JPH0473899

Document Type and Number:

Japanese Patent JPH0473899

Kind Code:

B2

Abstract:

PCT No. PCT/DE86/00515 Sec. 371 Date Aug. 10, 1987 Sec. 102(e) Date Aug. 10, 1987 PCT Filed Dec. 16, 1986 PCT Pub. No. WO87/04035 PCT Pub. Date Jul. 2, 1987.This system comprises a passive bus system which, for the incoming direction (NT->TE), contains a ring-shaped bus, whereby the device connector lines branched off it, have the same signal transit times, and for the outgoing direction (TE-NT) contains a bus line terminated in a low reflection fashion. For the combination of the bit currents flowing from, or respectively to the terminal equipment, a time division multiplex super frame is transmitted with the standard bit rate of 139,264 Mbit/s, which, in both directions, is composed of two 8704 bit frame containing a complete picture line respectively, wherein B bits are contained for the two alternately transmitting ISDN-narrow band channels (B1) and (B2) and bits for the frame synchronization (Rahm-Sync), or respectively segment synchronization (Vor). Compared tothe fraame in the incoming direction, the frame in outgoing direction is shifted by 80% of the frame period, and contains one prefix (Vor) respectively between the signals of various sources reaching the receiver of the network termination unit (NT) with different phase relation, this prefix comprising a clock and a subsequent synchronization bit pattern. The D-channel-signalizing bit (D) is transmitted at the frame start and is expanded at least 10-fold and pseudoternarily coded for the purpose of clearly indentifying overlapping impulses of different simultaneously active sources.

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