Document Type and Number:
Japanese Patent JPH0475690
Kind Code:
B2
Abstract:
PURPOSE:To relieve the load imposed on a CPU and the software by setting a data corresponding to the amount of frequency change and the direction of change to a resistor so as to allow a desired sweep oscillation to be executed by the hardware. CONSTITUTION:A data relating to sweep oscillation from the CPU is transmitted to register 1-4 by a data bus 11 and written in each register by a write signal 12. The data in a shift register 5 is shifted by the number of times' share set in a register by a shift number of times control section 2'. Addition or subtraction of an adder 6 is controlled depending on the content set to a register 3 by a code controlling section 3' and the addition or subtraction is performed in the timing of a switching signal from a timer 8. A counter 7 counts a clock signal 9 and when the counted value equals to an output value of the adder 6, a pulse is generated. Through the constitution above, pulse trains whose period is changed at each time Tb are outputted so as to obtain the sweep oscillation whose frequency is changed sequentially.
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Inventors:
YAGI HIROMITSU
Application Number:
JP4531983A
Publication Date:
December 01, 1992
Filing Date:
March 19, 1983
Export Citation:
Assignee:
RICOH KK
International Classes:
H03K5/156; H03K3/72; H03K23/66
Next Patent: SEWING MACHINE DEVICE