Document Type and Number:
Japanese Patent JPH0476531
Kind Code:
B2
Abstract:
PURPOSE:To facilitate circuit integration by deciding physically a pulse width and a pulse interval depending on the relative quantity between voltages of two voltage comparison inputs and a voltage from a reference voltage generating circuit, realizing the reference voltage of the reference voltage generating circuit simply with high accuracy depending on a resistance division circuit or the like so as not to require capacitance. CONSTITUTION:A reference voltage generating circuit 11 generates a predeter mined voltage depending on the count state of a counter 5. A timing pulse is obtained from an output Q of a flip-flop 9, the pulse voltage is changed by a voltage of a voltage comparison input A2 and the pulse interval is changed depending on the voltage at the voltage comparison input A1. For example, let the period of a clock pulse phi2 be T2, then the pulse width of the timing pulse obtained from the output Q of the flip-flop 9 changes depending on the voltage V2 of the voltage comparison input A2. Let the period of a clock pulse phi3 be T3, then as to the pulse interval, a similar output diagram is obtained while the voltage V2 is replaced into a voltage V1 of the voltage comparison input A1 (x axis) and the pulse interval T2 is replaced into a pulse interval T3 (y axis).
Inventors:
SUDO TOSHIO
Application Number:
JP16221685A
Publication Date:
December 03, 1992
Filing Date:
July 22, 1985
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
H03K3/017; H03K3/03; H03K3/78; H03K5/05; H03K5/156; H03K23/00; H03K23/66
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