Document Type and Number:
Japanese Patent JPH0558583
Kind Code:
B2
Abstract:
An input protection circuit for an MOS device uses a thick-oxide transistor connected as a diode between a metal bonding pad and ground. The channel width of this transistor is chosen to be sufficient to withstand large, short-duration current spikes caused by electrostatic discharge. More important, the spacing between a metal-to-silicon contact to the drain of this transistor and the channel of the transistor (where heat is generated), is chosen to be much larger than usual so the metal of the contact will not be melted by heat propagating along the silicon surface during the current spike due to ESD. This spacing feature also applies to circuits for output pads, or circuits using diode protection devices.
Inventors:
ROBAATO ENU RAUNTORII
TOROI EICHI HAANDON
TOROI EICHI HAANDON
Application Number:
JP12236585A
Publication Date:
August 26, 1993
Filing Date:
June 05, 1985
Export Citation:
Assignee:
TEXAS INSTRUMENTS INC
International Classes:
H02H7/20; G05F3/24; H01L21/822; H01L21/8234; H01L27/02; H01L27/04; H01L27/06; H01L27/088; H01L29/10; H01L29/423; H01L29/78; H03H1/00; (IPC1-7): H01L29/784; H01L27/04; H01L27/06
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