Title:
【発明の名称】誤り検出及び誤り訂正方法
Document Type and Number:
Japanese Patent JPH06101207
Kind Code:
B2
Abstract:
A method is provided for detecting and correcting error words in a data block formed of a plurality of words each consisting of or comprising a predetermined number of bits of digital signal, the block including first error check words, second error check words not completely coincident with the first words, and a third error check work. The method comprises first executing an error check by the third check word and concluding that an error is present in each of the words of the data block when an error is detected, executing second and third error checks by the respective first and second error check words, and thereupon setting one of three states, namely a state in which each of the words is correct, a state in which each of the words has an error, and a state in which it is yet undetermined whether each word is correct or has an error; and when words having errors or undetermined words are included in the first and second words series, changing the state of the words having errors or the undetermined words.
Inventors:
Takuji Himeno
Application Number:
JP5013685A
Publication Date:
December 12, 1994
Filing Date:
March 13, 1985
Export Citation:
Assignee:
ソニー株式会社
International Classes:
G11B20/12; G11B20/18; H03M13/00; (IPC1-7): G11B20/18
Attorney, Agent or Firm:
Masatomo Sugiura