Title:
【発明の名称】大電力半導体装置
Document Type and Number:
Japanese Patent JPH0671063
Kind Code:
B2
Abstract:
One of a pair of the module type semiconductor devices(401, 401a), signal input terminals (Es, G) are located on the other side of current output terminals (E) with respect to current input terminals (C), and that, in the other of a pair of the module type semiconductor devices (402, 402a), signal input terminals are mounted on the other side of current input terminals with respect to current output terminals. Distance of connections between element in the case of bridge connections may be shortened to the minimum. Since the signal input terminals (Es, G) may be located outside the bus bars (601, 602, 603) openings need not be formed in the bus bar. Space or the bus bar's surface area thus may be effectively used, with the result that a decrease in commutating inductance is achieved.
Inventors:
Hideshima Makoto
Application Number:
JP23524089A
Publication Date:
September 07, 1994
Filing Date:
September 11, 1989
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L25/07; H01L25/10; H01L25/11; H01L25/18; H02M7/00; H02M7/48; (IPC1-7): H01L25/10; H01L25/18
Domestic Patent References:
| JP62104592B | ||||
| JPH01194344A |
Attorney, Agent or Firm:
Eiji Morota