Title:
【発明の名称】スイツチング段
Document Type and Number:
Japanese Patent JPH0758897
Kind Code:
B2
Abstract:
A switching stage receives two levels at its input, i.e. a high selection level and a low non-selection level. The Darlington stage (T1, T2) supplies at its output (E) a high current in the selected mode and a considerably smaller current in the non-selected mode. In order to accelerate the evacuation of charges accumulated in the base of T2 and hence the deselection time of the stage, an auxiliary current source (I), is connected to a point A. Between the base (B) of the transistor T2 and the point A two diodes (D1, D2) are connected in series in the forward direction. Between the emitter (E) of T2 and the point A a diode (D3) is connected in the forward direction. In the selected mode, the major part of the current I passes through D1, D2 and this current permits the evacuation of the charges from the base of the transistor T2 when the stage is deselected.
Inventors:
Gi Inbel
Belotsk/Jack
Belotsk/Jack
Application Number:
JP8621886A
Publication Date:
June 21, 1995
Filing Date:
April 16, 1986
Export Citation:
Assignee:
N-Filippus Full-Iran Penhu Abriken
International Classes:
H03K17/60; G11C8/08; G11C8/10; G11C11/415; H03K17/615; (IPC1-7): H03K17/615
Domestic Patent References:
| JPS5922414A |
Attorney, Agent or Firm:
Akihide Sugimura (1 outside)
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