Title:
【発明の名称】全差動出力CMOS電力増幅器
Document Type and Number:
Japanese Patent JPH10507334
Kind Code:
A
Abstract:
A fully differential output CMOS power amplifier suitable to be used in a non-volatile memory mixed mode chip for voice record and playback to drive a very low impedance load such as an 8 ohm speaker from a low voltage power supply. This fully differential CMOS power amplifier utilizes a voltage multiplying technique for the input stage, a level shift/gain stage, and a common mode feedback network. It also utilizes native n-MOS having a threshold voltage VT APPROX 0v for the folded cascode differential input, native n-MOS (VT APPROX 0v) for the source follower output stage, enhancement n-MOS (VT APPROX 0.7 v) for the common source output, and a voltage regulator using p-MOS diode connected devices for simulating a resistor divider to regulate the voltage multiplier output. The amplifier also includes a mechanism for crossover distortion reduction at the output driver stage, and a scheme to set the idle current in the output driver n-MOS transistors.
More Like This:
Inventors:
Trang, Hugh Van
Application Number:
JP50774197A
Publication Date:
July 14, 1998
Filing Date:
July 24, 1996
Export Citation:
Assignee:
Information Storage Devices Inc.
International Classes:
G05F3/24; H03F3/30; H03F3/45; (IPC1-7): H03F3/45
Attorney, Agent or Firm:
Masaki Yamakawa (5 outside)