Japanese Patent JPS5018752

B1

1,255,528. Pulse modulation circuits. NORTHROP CORP. 14 Aug., 1969 [3 Sept., 1968], No. 40780/69. Heading H4L. [Also in Division G4] A pulse modulation arrangement constituting a voltage controlled oscillator includes an integrator to which a signal voltage is applied, a one-shot multivibrator 35 which is connected to the output of the integrator, and a reference frequency source providing a sequence of clock pulses Tr connected to the multivibrator input to trigger the multivibrator, whereby the markspace ratio of the multivibrator output is a function of the signal voltage. The width of multivibrator output pulses is progressively increased or decreased by the integrator output in successive cycles to provide a progressive phase shift of their trailing edges with respect to the clock pulses. The arrangement is stabilized by applying the integrator output to the multivibrator via an operational amplifier 36, and providing a feedback path which includes a chopper and low-pass filter 39 and 40. As shown, the. clock pulses Tr are applied-to the transistor Q5 of the one-shot multivibrator 35 formed by transistors Q5 and- Q6 and associated capacitor, the trailing edges of the pulses turning off transistor Q5 to give, in the absence of any input from the integrator to the operational amplifier 36 formed by transistors Q1, Q2 and Q3, a multivibrator output of constant markspace ratio at the frequency of the Tr pulses. NAND gates 41 and 42 reshape the multivibrator output and provide opposite polarity rectangular pulse outputs OS and OS1; for the output OS1, the leading edges of the output pulses correspond to the clock pulses Tr, while the trailing edges are employed to trigger a flip-flop to produce an output sequence of pulses having a repetition rate which equals that of the clock pulses for the case of no input to the integrator. For a constant D.C. input voltage to the integrator, the ramp output of the amplifier 36 controls the current through transistor Q4 which in turn controls the turn-on time of Q5, whereby the durations of the OS1 pulses, and hence the times of occurrence with respect to the clock pulses of the flip-flop pulses derived from their trailing edges, are progressively changed to provide an output flip-flop pulse repetition rate which is a linear function of the D.C. input to the integrator. The feedback circuit to amplifier 36 includes the chopper formed by transistors Q7 and Q8, and the low pass filter formed by R4 and C1 To permit continuous operation: despite the limitation upon total phase shift of the trailing edges of the multivibrator pulses imposed by the unmodulated mark-space ratio (Fig. 9, not shown), logic circuitry (Figs. 3a and 7, not shown) is included, to advance or delay the triggering of the multivibrator by one clock pulse when the phase shift exceeds a predetermined positive or negative value (Figs. 11 and 12, not shown) and simultaneously to reset the integrator output to zero (Fig. 6, not shown, and Division G4).

JP6931069A

July 01, 1975

September 01, 1969

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G01S5/10; G01S1/30; G06G7/186; H03C3/00; H03K4/501; H03K5/00; H03K5/04; H03K7/04; H03K7/08; H03L7/06; (IPC1-7): H03K7/08; G01S5/06

US3258605A

1966-06-28

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