Document Type and Number:
Japanese Patent JPS5166755
Kind Code:
A
Abstract:
1343329 Transistor amplifying circuits RCA CORPORATION 27 May 1971 [11 June 1970] 17488/71 Heading H3T An amplifier for driving a load comprises an input stage having an output node, and including at least a first bipolar transistor, the output node being coupled to a terminal for the load by means including a voltage follower output stage, The amplifier further includes a first field-effect transistor operated in the common gate configuration, its source-drain path connecting the output node and the voltage follower output stage, the field-effect transistor being operative to shift the D.C. level present at the output node of the input stage and to translate the signal current present at the output node to the output stage. A substantially constant current source comprising the source to drain path of a second field-effect transistor is connected to the collector electrode of the bipolar transistor for providing more current than is passed by that transistor, the source to drain path of the first field-effect transistor carries to the output stage that portion of the current from the constant current source not passed by the bipolar. In an embodiment, the input stage comprises a pair of bipolar transistors 10, 12 in long-tailed pair connection, their common emitter load comprising the collector-emitter path of a further transistor 14. Transistor 12 has as collector load the drain to source path of a field-effect transistor 16 and the collector is coupled to the source of field-effect transistor 20 which is common gate connection. The drain of field-effect transistor 20 has as load the collector-emitter path of bipolar transistor 26 and drives the base of emitter-follower bipolar transistor 30. The emitter of transistor 30 is returned to negative supply terminal 4 via the collector-emitter path of bipolar transistor 44 and resistor 48. Bias is provided for the gates of field-effect transistors 16, 20 and the base of bipolar transistor 44 by a biasing chain comprising diode-connected field-effect transistors 34, 36, resistors 38, 42 and diode-connected bipolar transistor 46. The arrangement, which. may comprise an integrated circuit, is such that both input terminals 2, 3 and output terminal 6 are at earth potential: provision may be made for balancing the arrangement, by means of resistors 18, 32 and external potentiometer 50. In a second embodiment (Fig. 2, not shown) the collector circuit of the first bipolar transistor (10) also comprises a load in the form of the drain to source path of a further field-effect transistor and it provides a further drive for the output stage via another field-effect transistor in common gate connection and a bipolar transistor (26) providing phase-reversal.
Inventors:
SUTEFUANO GURAFU
Application Number:
JP11544475A
Publication Date:
June 09, 1976
Filing Date:
September 23, 1975
Export Citation:
Assignee:
RCA CORP
International Classes:
H03F3/343; H03F3/30; H03F3/34; H03F3/345; H03F3/347; H03F3/45; (IPC1-7): H03F3/34