Document Type and Number:
Japanese Patent JPS5314182
Kind Code:
B2
Abstract:
An arithmetic operation and indication apparatus of the double length system which comprises a Y register for storing operators and an X register including a first and a second half memory section each provided with the same number of digit positions as those of the Y register and having the first half memory section stored with operands, wherein the so-called underflow system is adopted to indicate the result of arithmetic operation and suppress the insignificant digits which might otherwise appear in the blank digit positions following the lowest order digit of a significant number finally obtained by said operation, starting with the insignificant digit of lowest order included in the second half memory section.
Application Number:
JP5394372A
Publication Date:
May 16, 1978
Filing Date:
May 31, 1972
Export Citation:
International Classes:
G06F7/496; G06F3/14; G06F3/147; G06F7/525; G06F15/02; G09G3/04