Document Type and Number:
Japanese Patent JPS5755206
Kind Code:
B2
Abstract:
Combined low energy, high density ion implantation and kinetic transport deposition of refractory or other materials is carried out under very high vacuum conditions. The process facilitates formation of large area, highly doped, shallow semiconductor junctions and the associated electrodes. The steps of pre-implantation cleaning, ion implantation for junction formation, ohmic contact formation by kinetic transport deposition, and postimplantation anneal all are carried out in the same chamber.
Application Number:
JP697174A
Publication Date:
November 22, 1982
Filing Date:
January 12, 1974
Export Citation:
International Classes:
G21K5/04; H01J37/317; H01L21/00; H01L21/263; H01L21/265