Title:
DATA PULSE PROCESSING CIRCUIT
Document Type and Number:
Japanese Patent JPS58125910
Kind Code:
A
Abstract:
A circuit arrangement for improving the shape of a data pulse waveform prior to data slicing by correcting for a reduction of the high frequency content of the waveform using an adaptive crispening technique. The arrangement comprises a high pass filter (1) connected to an input (8) at which the waveform is applied. The filter (1) separates the high frequency content which is multiplied by an amplitude correcting signal in a multiplier (2). The signal data pulse waveform and the multiplier output are added in an adder (6) to produce a resultant output waveform, which is fed to a data slicer (10). The resultant output waveform is also applied to a peak-to-peak detector (3) via a switch (7) when the latter is closed periodically by a timing circuit (5). The detector (3) produces a control signal proportional to the amplitude of the resultant output waveform which it receives via the switch (7). A subtractor (4) produces the amplitude correcting signal as the difference between the control signal and a reference signal (RF).
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Inventors:
KURISUTOFUAA POORU SAMAAZU
Application Number:
JP21071682A
Publication Date:
July 27, 1983
Filing Date:
December 02, 1982
Export Citation:
Assignee:
PHILIPS NV
International Classes:
H04B3/06; H03K5/12; H04B3/04; H04L25/03; H04N7/035; (IPC1-7): H03K5/08; H04B3/04; H04L25/02
Attorney, Agent or Firm:
Akihide Sugimura