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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS58143587
Kind Code:
A
Abstract:

PURPOSE: To improve the reliability and operational characteristics of E/D type inverter by a method wherein the E type junction type FET and D type NESFET are respectively utilized as driving FET and loading FET to be formed by means of only one time ion implantation.

CONSTITUTION: The n type conductive layers 221, 222 are formed on the specified region of semiinsulated GaAs crystal substrate 21 and Zn is diffused on the specified region to form P type conductive layer 27 as p-n junction. Then AuZn alloy on AuGe alloy are respectively evaporated on P type conductive layer 27 and source.drain electrodes to be heat-treated forming gate electrode 231, source electrode 241 and drain electrode 251. The source electrode 242, drain electrode 252 on the loading FET-Q22 side are formed by AuGe alloy together with the driver side. Then Al is evaporated to form gate electrode 232 as Schottky barrier and finally the wiring 26 required for connecting these two FETs with each other is formed.


Inventors:
HOUJIYOU AKIMICHI
Application Number:
JP2700682A
Publication Date:
August 26, 1983
Filing Date:
February 22, 1982
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L21/8236; H01L27/088; H01L27/095; H01L29/80; (IPC1-7): H01L27/06
Attorney, Agent or Firm:
Takehiko Suzue



 
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