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Title:
REFRESH CONTROLLING SYSTEM
Document Type and Number:
Japanese Patent JPS58171788
Kind Code:
A
Abstract:

PURPOSE: To reduce the probability of competition between refresh request and access request to improve the throughout, by discriminating the state, where the access request to a memory device does not exist, to perform the refresh operation or delaying the refresh operation.

CONSTITUTION: Refresh counters REFC0 and REFC1 count clocks and apply a refresh signal to competition circuits CF0 and CF1 at intervals of a prescribed time to clear counted contents. Microprogram control memories MCM0 and MCM1 output a memory access request signal for an instruction which accesses the memory device, and the refresh request is provided during an instruction which does not require the access. Competition circuits CF0 and CF1 perform competition processings for the access request and the refresh request from data processing devices CC0 and CC1. Thus, the probability of competition between two requests is reduced to improve the throughout of data processing devices.


Inventors:
OSADA TAKATOSHI
Application Number:
JP5331482A
Publication Date:
October 08, 1983
Filing Date:
March 31, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G11C11/406; (IPC1-7): G11C11/34
Domestic Patent References:
JPS5355918A1978-05-20
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)



 
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