PURPOSE: To make the control of a memory element easier by storing a unit of plural number of picture element data in the same address of the different memory elements to make an address signal generation circuit in common.
CONSTITUTION: An address signal is supplied to RAMs M11, M12..., M21, M22..., M16 and M26... from a common address signal generation circuit 105 in a memory write controller. In the memory circuit, four RAMs Mi1∼Mi4, which store picture elements of luminance signals for one frame, and two RAMs Mi5 and Mi6, which separately store each picture element of chrominance signals R-Y and B-Y for one frame are arranged in steps equivalent to the number of quantized bits (i), e.g. six steps, and also six picture elements in total, which are transmitted as the same unit by an address signal from the common circuit 105, are stored in the same address by upper 6 bits respectively.
TAKASHIMA SEIICHI
SHIBAMOTO TAKESHI
SUGIYAMA HIROYUKI
AMANO YOSHIAKI
TANAKA KOUJI
SUZUKI FUJIO
KUBO MITSUO
KIKUCHI MITSURU
