Title:
【発明の名称】デジタル画像情報の編集のための方法及び装置
Document Type and Number:
Japanese Patent JPS58500917
Kind Code:
A
Abstract:
A method and apparatus, comprising a video data bus (8), a plurality of video memory modules (VM1-VMN), and bus arbitration circuits (BAC1-BACN) associated with each video memory module, are disclosed for compiling digital image information for display. A data processor (1) addresses the plurality of video memory modules over a processor data bus (2), the data processor for assigning a priority value to picture element data stored in the video memory modules. Upon command of the data processor, a frame (5 to 300) of picture element data is serially compiled on the video data bus (8). Data contention between video memory modules for access to the video data bus is controlled by the bus arbitration circuits, the picture element data bidding with the highest priority value gaining access. In one embodiment, the priority value represents the depth of a point of a solid object for display and/or the relative depth of picture element data comprising the object for display. The data processor may change the priority value associated with picture element data for display as well as the coordinates of data location in the display. Accordingly, textual characters having the highest priority and solid objects having a lesser priority may appear to move in front of one another on a background having the lowest priority value without interference in a sequence of frames of information for display.
Inventors:
Fleming Jiemus Musichard
Application Number:
JP50207582A
Publication Date:
June 02, 1983
Filing Date:
May 18, 1982
Export Citation:
Assignee:
Western Electric Campani, Inco-Polesed
International Classes:
G09G5/00; G06T15/40; G09G5/395; (IPC1-7): G09G1/06; G06F15/20
Attorney, Agent or Firm:
Masao Okabe