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Title:
REPRODUCING SIGNAL PROCESSING CIRCUIT FOR VIDEO TAPE RECORDER
Document Type and Number:
Japanese Patent JPS5892189
Kind Code:
A
Abstract:

PURPOSE: To avoid malfunction of a control loop for the prevention of a virtual lock even if a skew takes place, in a reproducing signal processing circuit of a video tape recorder having the control loop.

CONSTITUTION: A control loop to prevent a virtual lock consists of a VCO19, a 4-horizontal scanning period counter 27, a logical circuit 28, a control signal output circuit 29, an integration circuit 30, and a mixer 31. At a time t1 when a channel switching signal P changes from "0" to "1", the -Q output of an FF32 goes to "0" and a D input of an FF34 goes to "1". At a time t2 when a signal S4 changes from "0" to "1", the Q output of the FF34 is reset to "1" and the -Q output of the FF32 is to "1", and the D input of the FF34 goes to "0". At a time t3, the Q output of the FF34 goes to "0". At a time t4 when the signal P changes from "1" to "0", the -Q output of the FF33 goes to "0" and the D input of the FF34 goes to "1". At t5, the Q output of the FF34 goes to "1" and returns to "0" at t6. The signal S4 is a missing signal at channel changeover, and malfunction can be prevented by this signal.


Inventors:
CHIBA MITSUO
Application Number:
JP19138381A
Publication Date:
June 01, 1983
Filing Date:
November 27, 1981
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11B20/02; H04N9/83; (IPC1-7): G11B5/027; H04N9/497
Attorney, Agent or Firm:
Yoshihiro Morimoto



 
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