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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS59117785
Kind Code:
A
Abstract:

PURPOSE: To supply stably a charging current independently of the duty ratio by driving two sets of holding circuits where no supply current is produced when a node is at a low potential by transistors (TRs) of a prescribed connection respectively by a refresh pulse and an inverted refresh pulse.

CONSTITUTION: When a node 2 of a holding circuit 12 is brought into a low potential via a driver circuit 11, a TR9 is not turned on via a node 8 even if the refresh pulse is inverted to a high level and a useless supply current is interrupted. On the other hand, when the node 2 is brought into a bootstrap voltage via the circuit 11 and the pulse goes to a high level, a recharging current is applied to the node 2 via the TR9. The circuit 17 the same as the circuit 12 supplies the recharging current similarly when the inverted pulse ' is impressed. Thus, the recharging current is supplied stably at all times independently of the duty ratio of the refresh pulse.


Inventors:
MASUKO KOUICHIROU
YAMADA MICHIHIRO
Application Number:
JP23168782A
Publication Date:
July 07, 1984
Filing Date:
December 24, 1982
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G11C11/407; G11C11/34; (IPC1-7): G11C11/34
Attorney, Agent or Firm:
Masuo Oiwa



 
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