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Title:
【発明の名称】3値記憶回路
Document Type and Number:
Japanese Patent JPS5912044
Kind Code:
B2
Abstract:
PURPOSE:To simplify comparatively the structure of a memory circuit used in the digital system utilizing the ternary logic by ternary algebra.

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Inventors:
TSUJIMURA HIDEYUKI
Application Number:
JP6497276A
Publication Date:
March 21, 1984
Filing Date:
June 02, 1976
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F7/00; H03K3/027; H03K3/29; H03K19/20; (IPC1-7): H03K3/29; G06F7/00; H03K19/20
Attorney, Agent or Firm:
Uchihara Shin



 
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