Title:
【発明の名称】スタック・メモリ装置
Document Type and Number:
Japanese Patent JPS6012658
Kind Code:
B2
Abstract:
PURPOSE:To achieve high speed processing and low cost, by constituting a device with one high speed buffer memory and a plurality of low speed stack memories. CONSTITUTION:Data transfer between a high speed buffer memory 1 and low speed memory stacks 2-1-2-n is made by block unit. When readout or write-in request for environmental information is made, if a block determined with a stack pointer register 4 is in existence in a high speed buffer memory 1, is checked. If a block coincident with the block determined with the register 4 is not in existing in the high speed buffer memory , either one of a block B1 to B3 is assigned to the block to the block determined at the register 4.
Inventors:
HATSUTORI AKIRA
HAYASHI HIROSHI
HAYASHI HIROSHI
Application Number:
JP18219780A
Publication Date:
April 02, 1985
Filing Date:
December 22, 1980
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G06F9/46; G06F9/34; G06F9/48; G06F12/08; G11C7/00; (IPC1-7): G06F12/08; G06F9/46; G11C7/00
Attorney, Agent or Firm:
Kyotani Shiro
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