PURPOSE: To reduce unnecessary interruption generation against CPU, by providing a measures blocking the inputting of the reception ready signals into CPU, when the transmitter/receiver for data communication receives break signals.

CONSTITUTION: When break signals, more than one character time, are inutted into the transmitter/receiver SLI-3 for data communication for a certain period of time, LSI-3 generates the reception ready signals for a unit of character, and the said signals are inputted into the AND gate-9. However, if receiving the break signals, LSI-3 continuously outputs the break signals through the break signal line-7. Then the output of the inverter-10 becomes lower level, and the gate-9 is shut off. Theregore, the reception ready signals to be inputted in the gate-9 are not inputted in the interruption controller-6. Thus the interruption against unnecessary CPU-1 by the reception ready signals is prohibited.