Japanese Patent JPS6140148

B2

PURPOSE:To effect the improvenemt in sensitivity and responsibility of a device by destroying harmful inversion and storage layers adjacent to an exposed surface of pn-junction through two gate electrodes buried in a protecting insulated film and the applied bias voltage thereupon. CONSTITUTION:An insuration film 7 for the surface protection is formed in the conventional method. An exposed surface of pn-junction 6 is covered by a film 7, which consists of three layers. To obtain these layers, a layer 7a, an electrode 21a, a layer 7b, an electrode 21b and a layer 7c are formed in turn. And terminals are taken out from the electrodes to allow a substrate to be biased. The electrodes 21a, 21b constitute concentric loops and a pn-junction surface 6 is located in the space between the both electrodes. A current-extracting electrode 3 is provided on a top insulation layer. With the forward-biased electrode 21b being applied the positive voltage V2, the surplus positive holes on the surface of the p-type substrate are removed away to the inside, while with the electrode 21a being applied the positive voltage, the surpulus politive holes on the surface of an N layer are removed away and thus a p- type inversion layer is destroyed. In such a way, a leakage current is reduced, the junction registance value of a detecting device is increased, and its responsibility is also improved.

FUKUDA TAKAYASU

JP13282778A

September 08, 1986

October 26, 1978

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FUJITSU LTD

H01L31/10; H01L31/02; H01L31/04

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