Title:
半導体装置、リセット制御システム及びメモリリセット方法
Document Type and Number:
Japanese Patent JPWO2004092962
Kind Code:
A
Inventors:
Matsuura 修
Application Number:
JP2003004946W
Publication Date:
October 28, 2004
Filing Date:
April 17, 2003
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F12/16; G06F1/24
Attorney, Agent or Firm:
Junichi Yokoyama