Document Type and Number:
Japanese Patent JPWO2021161364
Kind Code:
A1
Abstract:
In a semiconductor integrated circuit device, first and second IO cell rows are placed in an IO region on a chip. IO cells in the first IO cell row are larger in plane area than IO cells in the second IO cell row. Pads connected to the IO cells in the first IO cell row are located closer to an outer edge of the chip than any pads connected to the IO cells in the second IO cell row.
Application Number:
JP2021577720A
Publication Date:
August 19, 2021
Filing Date:
February 10, 2020
Export Citation:
