Document Type and Number:
Japanese Patent JPWO2022190916
Kind Code:
A1
Abstract:
A method for manufacturing a semiconductor device includes the following steps (S1)-(S6) in this order, and further includes the following step (SD) after step (S5). · Step (S1): a step for forming a first curable resin layer (X1) so as to cover a bump and a bump formation surface of a wafer having the bump formation surface, which is provided with the bump on one surface, and having a groove which is provided to the bump formation surface or a modified region which is formed inside the wafer, the resin layer being formed so as to be peelable from the wafer · Step (S2): a step for flattening the surface of the first curable resin layer (X1) on the side opposite to the bump formation surface · Step (S3): a step for curing the first curable resin layer (X1) to form a hardened material layer (p1) for grinding · Step (S4): a step for grinding the surface on the side opposite to the bump formation surface to separate the wafer into a plurality of chips along the groove or the modified region · Step (S5): a step for forming a second curable resin layer (X2) by pasting a second curable resin film (x2f) to the surface of the plurality of chips on the side opposite to the bump formation surface · Step (S6): a step for curing the second curable resin layer (X2) to form a protective film (r) · Step (SD): a step for cutting the second curable resin layer (X2) or the protective film (r) along the interval of the plurality of chips for division into shapes that correspond to each chip
Application Number:
JP2023505294A
Publication Date:
September 15, 2022
Filing Date:
February 28, 2022
Export Citation:
