PURPOSE: To detect an abnormal state when no address signal is generated for more than a specific period while a busy signal is generated by accessing a storing section storing data for data after designating an address and generating the busy signal from a control section while the accessing operation is performed.

CONSTITUTION: A control section 2 is actuated by a start signal outputted from the detecting section 6 of an abnormality detection circuit and starts time counting on the busy signal timer 6a and address signal timer 6b of the detecting section simultaneously with the output of the start signal. Moreover, the section 2 performs address designation to a storing section 1 and outputs a busy signal to the detecting section 6 upon receiving the start signal. During a normal operation, the section 2 inputs an address signal 5 to the detecting section 6 before the timer 6b completes the time counting operation and, as a result, the timer 6b is reset and the section 2 is restarted. When abnormality occurs, the address signal is stopped while the busy signal is generated and the timer 6b completes the time counting and outputs an abnormality detecting signal.