Title:
ABNORMALITY DETECTION CIRCUIT FOR SIGNAL PROCESSING DEVICE
Document Type and Number:
Japanese Patent JP3971212
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To eliminate a problem of processing accuracy (detecting accuracy) being influenced by a deterioration in insulation with time, and enhance certainty and reliability in detection of a break.
SOLUTION: A signal output portion 2so of a first signal processing unit 2 which outputs signals Sd which vary within a predetermined range A, and a signal input portion 3si of a second signal processing unit 3 which is fed with the signals Sd, are connected with each other through a signal line Ls. Further, the signal input portion 3si and the power output portion 3po of the second signal processing unit 3 are connected with each other through a pull-up resistor Ru to form a signal processor M. When an anomaly detection circuit 1 for detecting a break in the signal line Ls and power lines Lp and Ln is constituted in the signal processor M, an active element 4 is connected in series with the signal line Ls in the first signal processing unit 2. The active element 4 is turned on when supplied with the supply voltage E (Et) of the power line Lp in the first signal processing unit 2, and off when the supply of the supply voltage E (Et) is removed.
Inventors:
Munenori Tsuchiya
Yoshihiro Tomomatsu
Yoshihiro Tomomatsu
Application Number:
JP2002065258A
Publication Date:
September 05, 2007
Filing Date:
March 11, 2002
Export Citation:
Assignee:
Nagano Keiki Co., Ltd.
International Classes:
H02H3/24; H02H11/00; (IPC1-7): H02H3/24; H02H11/00
Domestic Patent References:
| JP8146069A | ||||
| JP5107292A | ||||
| JP6208693A |
Attorney, Agent or Firm:
Shimoda Shigeru