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Patent Searching and Data


Title:
ABNORMALITY DETECTOR AND LOAD CONTROLLING DEVICE USING SAME
Document Type and Number:
Japanese Patent JPH01234010
Kind Code:
A
Abstract:

PURPOSE: To improve reliability by detecting the abnormality of a load on the basis of a logic of a voltage applied to the load and a conductive/ interrupting state of a switch, and holding information by holding means.

CONSTITUTION: A malfunction detector 34 detects the abnormality of a load 22 on the basis of a logic of a voltage applied to the load 22 and conductive/ interrupting state of a transistor 26 as a switch, and interrupts the transistor 26 at the time of the abnormality. The detector 34 also outputs information indicating whether the load 22 is abnormal or not, and this information is held by a latch circuit 41. When the latch circuit 41 holds the information indicating the abnormality of the load 22 for a predetermined time or more, or when it is held more than predetermined number or more, a processor 29 diagnoses its trouble and controls at the time of the malfunction.


Inventors:
YAMANO SHINICHI
Application Number:
JP5964388A
Publication Date:
September 19, 1989
Filing Date:
March 14, 1988
Export Citation:
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Assignee:
FUJITSU TEN LTD
International Classes:
H02H3/00; G05F1/10; H02H7/20; (IPC1-7): G05F1/10; H02H3/00; H02H7/20
Domestic Patent References:
JPS6343515A1988-02-24
JPS61147723A1986-07-05
JPS62277017A1987-12-01
Attorney, Agent or Firm:
Nishikyo Keiichiro (1 outside)