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Title:
ABORT DETECTING SYSTEM
Document Type and Number:
Japanese Patent JPS6182551
Kind Code:
A
Abstract:

PURPOSE: To detect an abort precisely without generating an erroneous operation due to a noise, etc. by monitoring both a data quality detecting signal, which detects a data quality of a receiving signal, and a carrier detecting signal, and operating an abort timer.

CONSTITUTION: When a contact 20 of a relay 24 is connected, a receiving signal arrives from the circuit and is inputted to a demodulating part 21 and a carrier detecting part 22. During data transfer, namely, while the receiving signal is received, a flip-flop 26c is reset by an AND circuit 26b, and consequently, an abort timer 23 will not be started. On the other hand, when the data is transferred, a carrier detecting signal CD becomes off, and also a data signal quality detecting signal SQD from a threshold circuit 25b becomes off. When re- detecting signals CD and SQD become off, the flip-flop 26c is set by a NAND circuit 26a, and thus, the abort timer 23 is started and calculation is permitted. After the flip-flop 26c is set, the carrier detecting signal CD becomes on due to a noise, etc., as dotted lines shown in the figure, and even then, the abort timer 23 continues to count.


Inventors:
WATANABE MASARU
TANAKA HIROYA
KAKO TAKASHI
Application Number:
JP17866984A
Publication Date:
April 26, 1986
Filing Date:
August 28, 1984
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04M11/00; H04L13/00; H04L27/02; H04L29/08; H04M11/06; (IPC1-7): H04L13/00; H04L27/02; H04M11/06
Attorney, Agent or Firm:
Akira Yamatani



 
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