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Patent Searching and Data


Title:
ACCESS PROCESSING SYSTEM OF DATA ARRANGEMENT
Document Type and Number:
Japanese Patent JPS59742
Kind Code:
A
Abstract:

PURPOSE: To attain the high class language processing in high speed, by provding an index register handling only a decimal number, and omitting decimal-hexadecimal conversion for data referencing, rewriting and transferring for executing them with parameters of decimal number conversion.

CONSTITUTION: Data are stored in an index register 1 handling the decimal number only and they are summed 2 with a head address (a) of the arrangement A and stored in an address register 3. Further, the parameter of the hexadecimal mode or the address at normal memory access are stored in the address register 4. A multiplexer 5 selects one of the address registers 3, 4 with a mode switching signal MS, the content is extracted on a bus 7 and addressed to the arrangement A in the memory. It is impossible for areas 9, 10 to access the decimal parameter, and they are used for other applications. The result of access of the decimal parameter is read out from a bus 11 as data b1, b2. Thus, the decimal- hexadecimal(binary) conversion is omitted and the processing using the high class language is quickened.


Inventors:
SATOU NOBUYOSHI
Application Number:
JP11097382A
Publication Date:
January 05, 1984
Filing Date:
June 28, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F9/355; G06F9/302; G06F9/45; G06F12/00; G06F12/02; (IPC1-7): G06F9/34; G06F9/44; G06F13/00
Attorney, Agent or Firm:
Fumihiro Hasegawa