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Title:
ACQUIRING METHOD FOR OUTPUT OF DETECTOR OF SEQUENCE CIRCUIT
Document Type and Number:
Japanese Patent JPH06314108
Kind Code:
A
Abstract:

PURPOSE: To enable sure acquisition by simple improvement even when a peak time is shorter than one scan by detecting an input signal by plural internal relay circuits which are arranged dispersedly for each input signal in a sequence circuit constituting one scan.

CONSTITUTION: Detecting circuits 10-1-10-n for detecting the input signal X1 are arranged equally in the whole circuit and their detection outputs are 0Red to turn on a pilot lamp Y1. The respective detecting circuits 10-1-10-n constitute self-holding circuits which receive the input signal X1 by internal relays R1-Rn, which are offset by reset switches X8. Here, the circuits are arranged dispersedly and almost equally so that n>Tc>T, where (n) is the number of the detecting circuits, Tc is a one-scan time, and T is a switch-ON time. Consequently, outputs can stably be acquired without providing the detecting circuits 10-1-10-n with a sample holding function.


Inventors:
Domichi, Hidekazu
Application Number:
JP1993000105574
Publication Date:
November 08, 1994
Filing Date:
May 06, 1993
Export Citation:
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Assignee:
KOMATSU LTD
International Classes:
G05B19/05; (IPC1-7): G05B19/05
Attorney, Agent or Firm:
木村 高久