Title:
ACTIVE BIAS CIRCUIT
Document Type and Number:
Japanese Patent JP3450257
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a bias circuit that can interrupt current flowing to a circuit to be biased, without having to provide an exclusive switch for current interrupt.
SOLUTION: The bias circuit is provided with a diode connected transistor(TR) M1, to which a reference current IREF is supplied via a resistor R1, a TR M2 in cascade connection to the TR M1, a TR M3 whose gate is connected to a gate of the TR M1, and a diode-connected TR M4 connected in cascade with the TR M3. An output terminal T3 outputs an output bias voltage VOUT. A diode D, having a prescribed forward voltage drop, is inserted between the TRs M3, M4 and then an output bias voltage VOUT changed, in response to a change in a reference voltage V1 applied to a terminal T1 is decreased by the forward voltage drop of the diode D, without substantially affecting the operation of the bias circuit.
Inventors:
Zenichi Nishimura
Fuminobu Ono
Fuminobu Ono
Application Number:
JP2000052599A
Publication Date:
September 22, 2003
Filing Date:
February 28, 2000
Export Citation:
Assignee:
nec compound device Co., Ltd.
International Classes:
H03F3/34; G05F3/20; H03F1/02; H03F3/345; (IPC1-7): H03F1/02; H03F3/34; H03F3/345
Domestic Patent References:
| JP7231229A | ||||
| JP2001168697A | ||||
| JP62126662A | ||||
| JP1145947A | ||||
| JP2000163970A | ||||
| JP6230840A | ||||
| JP57115A | ||||
| JP63260206A |
Attorney, Agent or Firm:
Katsufumi Izumi
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