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Title:
ADAPTIVE TYPE ECHO ERASER
Document Type and Number:
Japanese Patent JPS5711544
Kind Code:
A
Abstract:

PURPOSE: To cancel echo and to prevent the distortion of echo line model at bidirectional communication, by forming an approximate echo through the echo line model.

CONSTITUTION: An output signal X(n-1) from a reception side symbol storage circuit 12 and an output signal Hjn from a tap coefficient storage circuit 15 are convolutinally integrated at a convolution integrating circuit 16 to obtain a transversal filter output Yn'. The output Yn' is an approximate echo signal and the echo is erased through the performance of subtraction in a subtractor 17. The output of the subtractor 17 is an erase residual signal en and applied to a transmission side output terminal 19 and a tap gain correction circuit 21. The circuit 21 corrects the tap coefficient of a tap coefficient storage circuit 15 by using the output signal Y(n-1) and the signal en of a reception side signal storage circuit 12. A correction control circuit 22 multiplies a coefficient which is determined with the output of a level difference detection circuit 12 to the correction term of the tap coefficiet storage circuit 15.


Inventors:
ITOU HIDENORI
Application Number:
JP8629780A
Publication Date:
January 21, 1982
Filing Date:
June 25, 1980
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04B3/23; (IPC1-7): H04B3/23
Domestic Patent References:
JPS55103430A1980-08-07