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Title:
ADDRESS-CHANGE DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH065079
Kind Code:
A
Abstract:

PURPOSE: To adjust ATD characteristics over a wide range of power-supply voltage and to prevent that an operating characteristic on the side of low voltage is deteriorated by a method wherein the delay or the pulse width of an ATD circuit is changed over according to whether the power-supply voltage is high or low.

CONSTITUTION: When the output D of a power-supply voltage detection circuit 1 is at a low potential 'L', an N-channel transistor T1 is turned off and a capacity element C3 is not connected. As a result, the delay time A1 from an inverter circuit I1 up to an inverter circuit I4 is small. When the output D is at a high potential 'H', the transistor T1 is turned on. The capacity element C3 is set to a connection state, and the delay time A1 from the inverter circuit I1 up to the inverter circuit I4 becomes large. Consequently, the pulse width of the output P of an address-change detection circuit 2 can be changed by the output D of the power-supply voltage detection circuit 1.


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Inventors:
IKEBE MASAZUMI
Application Number:
JP16321392A
Publication Date:
January 14, 1994
Filing Date:
June 23, 1992
Export Citation:
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Assignee:
NEC CORP
International Classes:
G11C11/41; G11C11/407; G11C17/18; (IPC1-7): G11C11/41; G11C11/407; G11C17/18
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
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