PURPOSE: To provide the method and the device for generating addresses capable of supplying memory addresses at the time of filter calculation with a small hardware at a high speed in a digital signal processor.

CONSTITUTION: The leading address stored in a first address register 2 beforehand is read out and an incrementer 7 writes a value with only '1' added to a second address register 3. The second time and thereafter, the value of the address is read out of the second address register 3 and the output of the incrementer 7 is also written in the second address register 3. When the final address is read out of the second address register 3, a second selector 6 selects the leading address of arrayed data held in the first address register 2 to be inputted to the incrementer 7 and the incrementer 7 updates the leading address of the arrayed data stored in the first address register 2.