PURPOSE: To enable high speed collection of saved address reference series data, by storing the logic block at address conversion, in nonregistration to address conversion index buffer (TLB) cleared every given time.

CONSTITUTION: When a TLB2 is cleared every given time with the output of a timer 6, the reference to different logic block afterward is handled as TLB nonregistration, the address conversion is made by referencing the conversion table on the main memory according to the nonregistration detection signal output from the TLB2, and the correspondence between the logic block and the physical address is newly registrated on the TLB2. Simultaneously, the address storage set 5 according to the nonregistration detecting signal from the TLB2 stores the program recognition number and the logic block number set on the logic address register 1 to an address buffer 51. Thus, the logic block at nonregistration is sequentially stored in the set 5 and it is written out to an external memory unit via the set 5 in the same order, allowing to collect the saved address reference series data in high speed.