PURPOSE: To eliminate the loss time caused after an subsidiary instruction is executed and to improve the performance of an advance controlling system, by executing immediately the instruction following an execution instruction after executing the subsidiary instruction in case the execution instruction, etc. are executed.

CONSTITUTION: A subsidiary instruction is read out of the 2nd operand address and then stored in an instruction buffer register iWR 1-2, and at the same time the contents of the register iWR 1-2 which is obtained before the subsidiary instruction is stored in an instruction buffer register iWRC 1-3. The subsequent instruction is selected at the area indicated by the pointers 3-0W3-11 and at a time point when the subsequent instruction is executed after executing the subsidiary instruction. At the same time, the instructions are fed to a pipeline control part 4 from the instruction buffer registers 1-0, 1-1 and 1-3 while the signal with which the register iWRC 1-3 is effective is kept at (1). An instruction can be read out after the execution instruction is executed by reading out the instruction following the subsequent instruction group within the register iWRC 1-3. Thus the reading efficiency can be improved for the instruction.