Title:
AFFINE TRANSFORMATION PROCESSOR
Document Type and Number:
Japanese Patent JPS63262771
Kind Code:
A
Abstract:
PURPOSE:To simultaneously execute the affine transformation and the synthesis of a picture by simultaneously affine transforming picture information and a mask signal, associating and storing them. CONSTITUTION:When the mask signal M has a logic 1, the signal of a terminal A is outputted to a terminal Y in data selectors 4-11 according to the control of a data multiplexer 3. Therefore, an input signal B (base picture signal) and the mask signal M are inputted to a first FIFO (first in and first out) 19 through the selector 11 and the output of a i-th FIFO is inputted to a (i+1)th FIFO. When the mask signal M has a logic 0, the signal of the terminal B is similarly outputted to the terminal Y only in a k-th data selector. Therefore, only the k-th FIFO is rewritten by the affine transformed input signal A and the synthesized picture of the base picture and the input signal A is outputted from an FIFO 12.
Inventors:
IDEI KATSUTO
MITA YOSHINOBU
SATO MAMORU
ENOKIDA MIYUKI
ISHIDA YOSHIHIRO
MITA YOSHINOBU
SATO MAMORU
ENOKIDA MIYUKI
ISHIDA YOSHIHIRO
Application Number:
JP9615587A
Publication Date:
October 31, 1988
Filing Date:
April 21, 1987
Export Citation:
Assignee:
CANON KK
International Classes:
G06T3/00; (IPC1-7): G06F15/66
Domestic Patent References:
| JPS6220070A | 1987-01-28 | |||
| JPS59231591A | 1984-12-26 | |||
| JPS60245040A | 1985-12-04 |
Attorney, Agent or Firm:
Yasunori Otsuka