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Title:
AGC CIRCUIT FOR BURST SIGNAL
Document Type and Number:
Japanese Patent JPH0918533
Kind Code:
A
Abstract:

PURPOSE: To secure the dynamic range of ADD-converted data by actualizing both the quickening of AGC loop response at the time of burst signal arrival and the reduction of in-loop noise after the response.

CONSTITUTION: A burst modulated signal is inputted to a 1st variable gain amplifier 1 to control the gain of the amplifier 1 through a detector 2 and a variable band low-pass filter 3. The output of a 2nd variable gain amplifier 4 is passed through a semisynchronous demodulator 5 and a decoder 9 to become decoded data. A frame detector 10 detects frames and a data end pattern. The demodulated signal is inputted to a subtracter 15 through squaring units 11 and 12 and an adder 13. A burst detector 16 monitors the output of the adder 13 and outputs a burst detection signal when a certain value is exceeded. A 2nd switch 18 selects a reference value unless a burst and frames are detected and the output of the subtracter 15 when they are detected, and applies it to an amplifier 4. A 1st switch 19 controls the band of the filter 3 according to the states of the burst detection and frame detection.


Inventors:
OTSUKA KIYOSHI
Application Number:
JP18843895A
Publication Date:
January 17, 1997
Filing Date:
June 30, 1995
Export Citation:
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Assignee:
ANRITSU CORP
International Classes:
H03G3/20; H03G3/30; H04J3/00; H04L27/22; (IPC1-7): H04L27/22; H03G3/20; H03G3/30; H04J3/00



 
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