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Document Type and Number:
Japanese Patent JPS59204306
Kind Code:

PURPOSE: To obtain an AGC circuit which prevents a decrease in reception sensitivity right after reception frequency switching by providing a switching point detecting means and a resetting means, and resetting an AGC voltage to an initial value right after the reception frequency switching.

CONSTITUTION: When a knob relating to a reception frequency switch 4 and a switch 15 for detection is rotated by one step in order to a channel where the level of a receive wave (fi) is low, the amplifying transistor (TR) Q1, TRQ2 for differentiation, and switching circuit 14 of a resetting circuit 13 operate by detection information on a switching point which is sent out of the switch 15 for detection to a terminal 12b of the AGC circuit 12 to connect the output side 3b of a filter circuit 3 to a reference potential point. The charged load of the capacitor C1 of the filter circuit 3 is discharged immediately through the reference potential point to attain to the initial value. Consequently, a high frequency amplifier 7 and an intermediate frequency amplifier 9 increase in gain and the gain of a receiving circuit is held constant regardless of an abrupt drop in the level of the receive wave (fi) to prevent a decrease in reception sensitivity right after the reception frequency switching.

Kameyama, Yoshinori
Application Number:
Publication Date:
November 19, 1984
Filing Date:
May 06, 1983
Export Citation:
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International Classes:
H03G3/20; (IPC1-7): H03G3/20
Domestic Patent References: