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Title:
ALARM STORAGE SYSTEM FOR MULTIPLEX LINE
Document Type and Number:
Japanese Patent JPH02246636
Kind Code:
A
Abstract:

PURPOSE: To improve the alarm processing capability by designating optionally a memory address and reading out it in order to increment and update number of times of occurrence of alarm of each channel stored in a memory with a memory update means on the occurrence of alarm.

CONSTITUTION: An incrementer 18 increments an alarm number data read from a memory 15 by '1' and supplies the result to a terminal A of a selector 17. Then a read/write signal of a CPU is supplied and a data incoming from a terminal 19 is written in an address for CPU designation of a memory 15, and an alarm number of times data read from the CPU designation address of the memory 15 is supplied from the terminal 19 to the CPU and then the alarm processing is applied by the CPU. Since the alarm production number of times for each channel of a received data is stored into the memory 15, a high speed alarm processing is implemented to improve the alarm processing capability.


Inventors:
FUKAMACHI KAZUHIRO
Application Number:
JP6841989A
Publication Date:
October 02, 1990
Filing Date:
March 20, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04J3/14; (IPC1-7): H04J3/14
Domestic Patent References:
JPS6294031A1987-04-30
Attorney, Agent or Firm:
Tadahiko Ito (2 outside)