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Patent Searching and Data


Title:
ALARM SUPERVISORY SYSTEM
Document Type and Number:
Japanese Patent JPS5472999
Kind Code:
A
Abstract:

PURPOSE: To exercise an economical alarm supervision, by detecting an alarm by scanning each unit by the use of a common alarm supervisory unit.

CONSTITUTION: Respective interfaces INF1 to INFn of circuit units CKT1 to CKTn divided on the fixed function unit are connected via supervisory control bus BS to common alarm supervisory control unit SV. By assigning memory part MDM stored with the alarm detecting operation and procedure for each operation at the time of alarm detection, processing part SVC scans each interface of the circuit units and receives the contents of the register, to which an alarm has been set, via bus SB. According to the address signal sent out, it is discriminated what circuit among circuit unit gets into trouble; and then, the process is done in accordance with supervisory sequency control information from memory part MEM and alarm display is made by display part DSP.


Inventors:
IWAMA MASAMICHI
YAMAZAWA MASAO
Application Number:
JP14094377A
Publication Date:
June 11, 1979
Filing Date:
November 22, 1977
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G08B25/00; G08B23/00; G08B31/00; (IPC1-7): G08B23/00; G08B25/00