Title:
ALIGNMENT HIGH-SPEED PROCESSING MECHANISM
Document Type and Number:
Japanese Patent JP3661138
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an alignment high-speed processing mechanism, which is capable of enhancing an alignment mechanism in utilization efficiency, alignment processing speed, and throughput.
SOLUTION: An alignment high-speed processing mechanism is equipment with a transfer mechanism 11, which transfers a semiconductor wafer W and an alignment mechanism 12, which aligns the semiconductor wafer W transferred via the transfer mechanism 11 in a prescribed orientation, wherein the semiconductor wafer W is delivered from the transfer mechanism 11 to the alignment mechanism 12 through the intermediary of a buffer mechanism 13.
Inventors:
Masahito Ozawa
Masaki Narushima
Masaki Narushima
Application Number:
JP10857998A
Publication Date:
June 15, 2005
Filing Date:
April 04, 1998
Export Citation:
Assignee:
東京エレクトロン株式会社
International Classes:
B65G49/07; H01L21/677; H01L21/68; (IPC1-7): H01L21/68
Domestic Patent References:
| JP7297258A | ||||
| JP5343500A | ||||
| JP7297262A | ||||
| JP5178416A | ||||
| JP1251734A |
Attorney, Agent or Firm:
Hajime Ohara