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Title:
AMPLIFIER CIRCUIT AND ANALOG/DIGITAL CONVERSION CIRCUIT
Document Type and Number:
Japanese Patent JP2010213042
Kind Code:
A
Abstract:

To provide an amplifier circuit which operates stably with respect to a wide-range input common voltage and has low current consumption, and to provided an A/D converter.

The amplifier circuit PA100 operates between a first power source VDD and a second power source GND. The amplifier circuit includes: a couple of transistors N1, N2 in which input signals VinP, VinN are input to the control terminals thereof; a couple of load resistors P1, P2 provided between the transistor N1, N2 and the first power source; a constant current source CS provided between the second power source and the couple of transistors N1, N2; and a first switch N3 connected in series with the constant current source CS between the second power source and the couple of transistors N1, N2 and in which ON/OFF is controlled in accordance with a clock signal.


Inventors:
NAKAJIMA YUJI
Application Number:
JP2009057599A
Publication Date:
September 24, 2010
Filing Date:
March 11, 2009
Export Citation:
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Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H03F1/02; H03F3/34; H03F3/72; H03M1/12; H03M1/36
Domestic Patent References:
JP2005223420A2005-08-18
JP2004266403A2004-09-24
JP2005210721A2005-08-04
Foreign References:
US6728240B12004-04-27
Attorney, Agent or Firm:
Ken Ieiri