PURPOSE: To decrease the error voltage remarkably by applying negative feedback control so as to compensate the error voltage generated in one clock period within the succeeding clock period.

CONSTITUTION: The constitution is employed such that a switched capacitor integration circuit 7 is provided to an input stage, an output of a voltage follower 8 to drive a capacitive load is fed back to a switched capacitor 4 of the switched capacitor integration circuit 7 and an input analog signal is given to a non-inverting input of an operational amplifier 2. The switched capacitor integration circuit 7 provided to an input stage is similar in its constitution to that of a switched capacitor integration circuit 9 being a load and consists of the operational amplifier 2, an integration capacitor 3 and the switched capacitor 4 comprising a switch 5, a capacitor 6, and the switch 5 is driven in phase to the switch 13 by a switch drive pulse.