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Title:
AMPLIFIER
Document Type and Number:
Japanese Patent JPS58141013
Kind Code:
A
Abstract:

PURPOSE: To turn on a P channel transistor (TR) when an input signal is at a high level or an N channel TR when at a low level by biasing the gate of the P or N channel TR to some value, and superposing the input signal through a capacitor.

CONSTITUTION: When the input signal is at the high level, a switch circuit D is turned on to obtain the value of a voltage VN1 by voltage-dividing the difference between a power voltage and the input signal voltage by the ratio between a resistance and a pullup resistance R when the switch circuit D is turned on, thereby holding an output terminal at the high level through a TRQP. When the input voltage rises from the low to the high level, the value of a voltage VN1 increases through capacity coupling to turn off the TRQ. At this time, the voltage at an input terminal is high, so even when the voltage VN1 rises to the value where the TR is turned off, the current path running through the switch circuit D is not formed and no discharge from a node N1 occurs. Therefore, the voltage VN1 is held high enough to turn off the TRQP.


Inventors:
BABA TATSUO
IEDA NOBUAKI
Application Number:
JP2209182A
Publication Date:
August 22, 1983
Filing Date:
February 16, 1982
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03F3/16; H03F3/34; H03F3/345; (IPC1-7): H03F3/16
Domestic Patent References:
JPS5661812A1981-05-27
Attorney, Agent or Firm:
Koji Hoshino



 
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