PURPOSE: To simplify the constitution of filter eliminating undesired component by providing a phase shifter obtaining two signals having a phase difference of 90° from each other, an absolute value circuit obtaining each absolute value and a selection circuit selecting and outputting a larger absolute value in the both.

CONSTITUTION: A digital signal M is formed into two signals C, S having a phase difference of 90° by a phase shifter 102 and the two signals C, S are subjected to full wave rectification by absolute value circuits 103,104 and become signals C, S. Then the two signals C, S are compared by the selection circuit 105 and the larger signal is selected and outputted to be a signal E. The signal E includes not only the amplitude signal but also the undesired component having a frequency 4 times of the (carrier) frequency of the input signal M and its harmonics, the undesired component is eliminated by a filter 106 and the amplitude signal A is outputted at a terminal 107. Since the fundamental frequency of the undesired component of the signal E being the output of the selection circuit 105 is as high as four times the (carrier) frequency of the input signal M and its component is small, the constitution of the filter 106 is simplified and a large output of the amplitude signal A is obtained.