To provide an amplitude equalization circuit capable of receiving data even without a preamble and without the need for a high speed response by inputting only data whose amplitude is constant to each amplitude equalization circuit.

Input data consisting of burst signals with different amplitude in time sharing multiplex are given to a bottom level detection circuit 1d and SW circuits 1a, 1b, 1c of a data demultiplex circuit section 1. The circuit section 1a is controlled by a control signal (a) corresponding to a time slot of a terminal equipment #1 to select input data only for a time slot of the terminal equipment #1, to give the selected data to an amplitude equalization circuit 2a, and to select an output of the circuit 1d in other cases and to input the selected data to the circuit 2a. The circuits 1b, 1c are controlled by signals b, c corresponding to the time slot of terminal equipments #2, #3, the input data to select the input data only at the time slot of the terminal equipments #2, #3, to provide the selected data to amplitude equalization circuit sections 2b, 2c and to select an output of the circuit 1d in other cases and to provide the selected data to the circuits 2b, 2c. An output of the circuit 1a (1b, 1c) is given respectively to the circuit 2a (2b, 2c), in which the amplitude is equalized.